François
6b56ab5c42
Standalone LGPL-2.1 parser for BSDL (IEEE 1149.1), shared by essim and bs_explorer. The parser is ported from the Viveris JTAG Core loader, decoupled from jtag_core, and extended with two extractions the original lacks: - PIN_MAP_STRING -> per-port physical package pin, scalar and vector; - TAP_SCAN_* -> TAP signal roles (TDI/TDO/TMS/TCK/TRST). Exposes a stable C ABI (bsdl_parse_file/buffer -> bsdl_t, bsdl_to_json) with a dependency-free JSON serializer and a bsdl2json CLI. CMake builds a versioned shared library with install/export rules for find_package(bsdl). Verified against m2gl010t, xcku040 and xcku15p (100% pin mapping, correct IDCODEs and TAP roles); api and parse regression tests pass, clean build. Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
19 lines
776 B
Markdown
19 lines
776 B
Markdown
# Sample BSDL files
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This directory is intentionally **not** populated with a BSDL database.
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BSDL files are mandated to be freely available by IEEE 1149.1, but their
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redistribution terms vary per vendor, so they are not vendored here. Point the
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tests and tools at a local directory instead.
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Sources:
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- Vendor sites (authoritative): TI, AMD/Xilinx, Intel/Altera, Lattice, NXP, ST…
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- [bsdl.info](https://bsdl.info/) — community aggregate (~14k files).
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- Quartus / Vivado installs bundle BSDL for their FPGAs.
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- For quick local testing, the sibling `bs_explorer` repo ships a few under
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`bs_explorer/data/bsdl_files/` (xcku15p, xcku040, m2gl010t).
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> Note: a *configured* FPGA's BSDL differs from the blank device — use the
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> blank-device BSDL for connectivity checks.
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