Restructure in anticipation of programming ARM CPUs (ARM7/9 via
EmbeddedICE, e.g. over an Olimex ARM-USB-OCD); FPGA path unchanged.
- modules/fpga -> modules/target; fpga_target -> jtag_target with a
`kind` (fpga|cpu) and grouped fpga/cpu sub-structs; data/targets.yaml
(env BS_TARGETS); API target_*; commands target_list/target_info
(kind-aware). Add arm7/arm9 families, arm_flash prog, embeddedice
debug, and cpu fields (ram_base/size, flash_base/size).
- new program/: `program <dev> <file>` dispatches by the target's prog
(svf wired; proxy_spi points at the flash workflow; arm_flash -> arm_debug).
- new arm_debug/: EmbeddedICE halt/resume/mem + arm_flash backend
declared, not implemented yet.
- bscan_* take const jtag_target* and read the fpga sub-struct.
- data/probes.yaml: arm-usb-ocd profile slot; data/targets.yaml: an ARM7
example entry. Docs + an ARM-debug design note in CLAUDE.md.
Builds; FPGA path re-validated on the IGLOO2 (target_list shows the CPU
example; jtag_open/autoinit/program 0 <svf> all work).
Co-Authored-By: Claude Opus 4.7 <noreply@anthropic.com>
François
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