François
043fef0a31
- `essim --commands-md [file]` instantiates the Tui, calls
`Tui::DumpCommandsMd(ostream&)` which iterates the live registry and
emits Markdown grouped by interactive/other, then exits. Single
source of truth: a new `CommandSpec` field surfaces automatically.
- CMake `doc` target now `DEPENDS essim` and chains:
doxygen → gen_api_md.py → doc/api/
essim --commands-md → doc/user/commands.md
- `doc/user/` adds:
- index.md (hand-written) — first session, interactive-screen
conventions, save/restore/replay overview.
- scripting.md (hand-written) — `set`/`$var` expansion semantics,
`source` event-paced execution, script-save denylist, worked
example pointing at test/system.essim.
- commands.md (auto-generated, regenerated by the `doc` target).
- Top-level README refocused on quick start; pointers to the new
doc tree (user/, api/, DESIGN.md) instead of an inline command table.
- doc/README.md and DESIGN.md document the two-pipeline doc workflow.
- `test/system.essim` and user docs anonymised: bkp → backplane,
vdn1/2/3 → payload1/2/3, cb3p → payload4, bpb/cob/ssu →
peripheral1/2/3; netlist file names + variable names + paths all
replaced with generic equivalents.
Co-Authored-By: Claude Opus 4.7 <noreply@anthropic.com>
90 lines
3.2 KiB
Plaintext
90 lines
3.2 KiB
Plaintext
# essim system bring-up script (anonymised sample).
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#
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# Layout: one VPX 3U backplane carrying four payload cards (three of the
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# same kind, one specialised) and three peripheral cards wired non-VPX.
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new
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# ---------------------------------------------------------------- variables
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set netlist_dir /path/to/netlists
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set peripheral1_nets $netlist_dir/peripheral1.qcv
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set backplane_nets $netlist_dir/backplane.NET
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set payload4_nets $netlist_dir/payload4.qcv
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set payload_nets $netlist_dir/payload.qcv
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set peripheral2_nets $netlist_dir/peripheral2.qcv
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set peripheral3_nets $netlist_dir/peripheral3.qcv
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# ---------------------------------------------------------------- modules
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load payload1 $payload_nets mentor
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duplicate payload1 payload2
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duplicate payload1 payload3
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load peripheral1 $peripheral1_nets mentor
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load backplane $backplane_nets altium
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load payload4 $payload4_nets mentor
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load peripheral2 $peripheral2_nets mentor
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load peripheral3 $peripheral3_nets mentor
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# ---------------------------------------------------------------- VPX tags
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# Backplane payload-side connectors, one slot per (Jx0,Jx1,Jx2):
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# J2x → payload1, J3x → payload2, J4x → payload3, J5x → payload4.
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set-type backplane J20 vpx-3u-bkp-p0
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set-type backplane J21 vpx-3u-bkp-p1
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set-type backplane J22 vpx-3u-bkp-p2
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set-type backplane J30 vpx-3u-bkp-p0
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set-type backplane J31 vpx-3u-bkp-p1
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set-type backplane J32 vpx-3u-bkp-p2
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set-type backplane J40 vpx-3u-bkp-p0
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set-type backplane J41 vpx-3u-bkp-p1
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set-type backplane J42 vpx-3u-bkp-p2
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set-type backplane J50 vpx-3u-bkp-p0
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set-type backplane J51 vpx-3u-bkp-p1
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set-type backplane J52 vpx-3u-bkp-p2
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# Payload connectors on each plug-in card.
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set-type payload1 P0 vpx-3u-payload-p0
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set-type payload1 P1 vpx-3u-payload-p1
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set-type payload1 P2 vpx-3u-payload-p2
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set-type payload2 P0 vpx-3u-payload-p0
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set-type payload2 P1 vpx-3u-payload-p1
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set-type payload2 P2 vpx-3u-payload-p2
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set-type payload3 P0 vpx-3u-payload-p0
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set-type payload3 P1 vpx-3u-payload-p1
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set-type payload3 P2 vpx-3u-payload-p2
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set-type payload4 P0 vpx-3u-payload-p0
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set-type payload4 P1 vpx-3u-payload-p1
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set-type payload4 P2 vpx-3u-payload-p2
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# ---------------------------------------------------------------- VPX wiring
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# Each connect dispatches via the registered vpx-3u transform.
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connect backplane J20 payload1 P0
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connect backplane J21 payload1 P1
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connect backplane J22 payload1 P2
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connect backplane J30 payload2 P0
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connect backplane J31 payload2 P1
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connect backplane J32 payload2 P2
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connect backplane J40 payload3 P0
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connect backplane J41 payload3 P1
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connect backplane J42 payload3 P2
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connect backplane J50 payload4 P0
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connect backplane J51 payload4 P1
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connect backplane J52 payload4 P2
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# ---------------------------------------------------------------- non-VPX
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# Both ends untagged → IdentityTransform (matches by canonical pin name,
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# so e.g. A1 ↔ A001 is paired thanks to canonical_pin_name).
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connect peripheral2 P3 peripheral3 P6
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connect backplane J1 peripheral3 P1
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# peripheral1 ↔ backplane
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connect backplane P100 peripheral1 J100
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connect backplane P101 peripheral1 J101
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connect backplane P102 peripheral1 J102
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# peripheral1 ↔ peripheral2
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connect peripheral1 J0 peripheral2 P0
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connect peripheral1 J1 peripheral2 P1
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connect peripheral1 J2 peripheral2 P2
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