Commit Graph

2 Commits

Author SHA1 Message Date
fe5b2c3d96 P3.2: source precedence + model-vs-netlist conflict check
Rank the spec sources (spec_source_rank: UserOverride > Bsdl > ConnectorModel
> Inferred > Imported); apply_model now refuses to overwrite a spec owned by a
higher-rank source, so one model never clobbers a more authoritative one. New
check_source_conflicts(System*) emits SourceConflict for a pin the BSDL
declares power/ground (a must-connect rail) that the netlist leaves
unconnected — a rail floated in the schematic; surfaced as a sixth `verify`
pass. Unit tests (75 cases) green; the real 8-card system reports 0 conflicts
(its rails are all connected) while the JTAG findings remain.

Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
2026-06-03 16:08:28 +02:00
1b507f1752 Pins: replace expected_signal_type field with a model-derived PinSpec
Introduce PinSpec (function/direction/pad/source) as the "expected" half of
pin verification, and make Pin::expected_signal_type() a derived accessor over
spec.function. pin_role() now returns a PinSpec; the connector layout (and,
later, BSDL) feed the same structure.

Pure refactor, behaviour-preserving: vpx_3u_role is still a stub, so every pin
maps to Other exactly as before. The new `pad` field will carry the BSDL
physical pin; direction/function will unlock contention/undriven/NC checks.

Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
2026-06-03 12:01:12 +02:00