build: split core/ from frontends/; prepare for multiple GUI/TUI targets
Reorganise the tree into business vs frontend as separate directories:
src/core/{domain,imports,app} (was system/, imports/, app/)
src/frontends/tui/ (was tui/ + main.cpp)
tests/tui/ (the FTXUI-coupled helper test)
All cross-dir #include paths rewritten; same-dir includes untouched.
CMake: essim_core is the frontend-agnostic business library — links libzip,
pugixml and bsdl, NO GUI toolkit. Each frontend is a self-contained
src/frontends/<name>/ (own CMakeLists, toolkit, main.cpp) that links
essim_core, selected with -DESSIM_FRONTEND=<name> (default tui; 'none' = core +
tests only, no toolkit fetched). FTXUI moved into the tui frontend. Tests are
split: essim_tests links essim_core (no FTXUI), essim_tui_tests links essim_tui.
Verified: default tui build green (ctest 2/2); ESSIM_FRONTEND=none builds the
core + tests with FTXUI never fetched and no `essim` binary.
Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
This commit is contained in:
92
src/core/domain/pin_role.cpp
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92
src/core/domain/pin_role.cpp
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#include "pin_role.hpp"
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#include "parts.hpp"
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#include "pin_name.hpp"
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#include "pins.hpp"
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#include <cctype>
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#include <exception>
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#include <string>
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#include <unordered_set>
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#include <vector>
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// VPX 3U built-in pin role tables.
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//
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// NOTE: real VITA 46 pin roles are connector-/profile-specific (data lanes,
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// power planes, GND chassis, etc.). The placeholders below are intentionally
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// minimal — fill in the actual per-(col,row) roles for your design when the
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// reference is available; the rest of the chain (set-connector-type → verify) is
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// already wired through this single function.
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namespace {
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// Quick char column dispatch — returns Other when the column isn't recognised.
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SignalType vpx_3u_role(char /*col*/, int /*row*/, int /*connector_idx*/) {
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// TODO: encode the real layout. Right now everything is "other"; verify()
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// therefore reports nothing for VPX until this table is filled in.
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return SignalType::Other;
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}
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bool parse_pin(const std::string &s, char &col, int &row) {
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if (s.size() < 2) return false;
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if (!std::isalpha((unsigned char)s[0])) return false;
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for (size_t i = 1; i < s.size(); ++i)
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if (!std::isdigit((unsigned char)s[i])) return false;
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col = (char)std::toupper((unsigned char)s[0]);
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try { row = std::stoi(s.substr(1)); }
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catch (const std::exception &) { return false; }
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return true;
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}
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} // namespace
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PinSpec pin_role(const std::string &kind, const std::string &pin_name)
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{
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PinSpec spec;
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if (kind.empty()) return spec;
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char col; int row;
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if (!parse_pin(pin_name, col, row)) return spec;
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SignalType st = SignalType::Other;
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int idx = -1;
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bool is_vpx_3u = false;
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if (kind.rfind("vpx-3u-bkp-p", 0) == 0
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|| kind.rfind("vpx-3u-payload-p", 0) == 0) {
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is_vpx_3u = true;
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const std::string suffix = kind.substr(kind.size() - 1);
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try { idx = std::stoi(suffix); } catch (const std::exception &) {}
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}
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if (is_vpx_3u && idx >= 0) st = vpx_3u_role(col, row, idx);
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spec.function = function_from_signal_type(st);
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spec.source = SpecSource::ConnectorModel;
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return spec;
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}
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std::vector<std::string> pin_layout(const std::string &kind)
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{
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// TODO: enumerate the canonical pin set for known connector types,
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// alongside `vpx_3u_role`. Empty for now — `FillPartFromLayout` becomes
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// a no-op and the rest of the pipeline (verify, explore, identity wiring)
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// works on whatever pins were imported.
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(void)kind;
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return {};
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}
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int FillPartFromLayout(Part *p, const std::string &kind)
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{
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if (!p) return 0;
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auto layout = pin_layout(kind);
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if (layout.empty()) return 0;
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std::unordered_set<std::string> existing;
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for (auto &kv : *p) existing.insert(canonical_pin_name(kv.first));
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int added = 0;
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for (const auto &name : layout) {
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if (existing.count(canonical_pin_name(name))) continue;
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if (p->exists(name)) continue;
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p->add(new Pin(name));
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++added;
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}
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return added;
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}
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