Signal types, pin role expectations, and a doctest suite.

Domain
- Signal carries a SignalType (Power/GndShield/Other), auto-inferred
  from the name in Signal::Signal via infer_signal_type. Override with
  the new `set-signal-type` command.
- SignalType extracted to its own header so Pin can store an
  `expected_signal_type` without a pins↔signals include cycle.
- pin_role(connector_type, pin_name) → SignalType lookup, called from
  set-type to populate each Pin's expected_signal_type. The VPX 3U
  table is currently a stub (returns Other).
- New `verify` command walks typed parts and reports pins whose
  connected signal's type doesn't match the expectation.
- ODS importer no longer drops pins with empty signal column — they
  stay in the part as NC, matching the rule "a pin is either NC or
  connected to a signal".
- persist: new S tag for non-default signal type overrides.

Tests
- doctest v2.4.11 via FetchContent (with CMAKE_POLICY_VERSION_MINIMUM
  shim, doctest's CMakeLists has a too-old floor for current CMake).
- Source files moved into a static library `essim_lib` so both `essim`
  and `essim_tests` reuse the same compilation. main.cpp is the only
  file kept out of the lib.
- Layer 1 (pure helpers): ToLower, LongestCommonPrefix, Tokenize,
  NaturalLess (numeric/case/leading-zero edge cases + total-order
  invariants), signal_type round-trips and infer_signal_type families,
  VpxTransform registry + symmetry + reference-table mapping for
  connector P0 row 1, IdentityTransform same-name wiring.
- Layer 2 (round-trip): build a synthetic 2-module system in code,
  save → restore → assert modules / parts / connector_types / NC pins
  / signal type overrides / connections + pin_map are all preserved.
- Tui::Tokenize moved to a free function in tui_helpers so tests can
  call it without dragging ftxui into the unit-test layer.
- 27 test cases, 123 assertions, ~150 ms.

Co-Authored-By: Claude Opus 4.7 <noreply@anthropic.com>
This commit is contained in:
2026-05-08 20:28:03 +02:00
parent f3920964f0
commit 4f27686e94
23 changed files with 732 additions and 32 deletions

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@@ -81,7 +81,15 @@ Built-in commands: `new`, `load`, `save`, `restore`, `source`, `script-save`, `c
Pending prompts (from incomplete inline commands) are NOT considered interactive and are filled by subsequent script lines, the way you'd expect. Lines starting with `#` and blank lines are skipped; leading/trailing whitespace is trimmed; `~/` is expanded.
`save` / `restore` (`src/system/persist.{hpp,cpp}`): tab-delimited line format, no extra deps. Tags: `M` (module), `P` (part with `connector_type`), `N` (pin → signal name; empty = NC), `C` (connection header with endpoints + `transform_name`), `W` (wire pair within the current connection). `restore` replaces `Tui::sys` entirely (`unique_ptr::reset`). Names are stored as-is — must not contain TAB or newline (true for the EE netlists we ingest). Format is versioned by the `# essim system snapshot v1` header for future compatibility.
`save` / `restore` (`src/system/persist.{hpp,cpp}`): tab-delimited line format, no extra deps. Tags: `M` (module), `P` (part with `connector_type`), `N` (pin → signal name; empty = NC), `S` (signal → type override; only emitted for non-default), `C` (connection header with endpoints + `transform_name`), `W` (wire pair within the current connection).
**Signals** carry a `type` (`SignalType::Power | GndShield | Other`) auto-inferred from the name in `Signal::Signal` via `infer_signal_type` (heuristic: GND/GROUND/SHIELD/CHASSIS → GndShield; PWR/VCC/VDD/VEE/VSS/VBAT/VS_/VS3_*/+/- prefixes → Power; else Other). Override with `set-signal-type <module> <signal> <power|gnd|other>`. The explore screen shows the type in the signal detail header.
**Pin role expectations**: every Pin carries an `expected_signal_type` populated by `set-type` from a per-(connector_type, pin_name) lookup (`src/system/pin_role.{hpp,cpp}`). The framework is wired end-to-end; the actual VPX 3U lookup table is currently a stub returning Other for all positions — fill in `vpx_3u_role(col, row, idx)` with the real VITA 46 layout when needed. The `verify` command walks all typed parts and reports pins whose connected signal's type doesn't match the expectation.
`SignalType` lives in its own header `src/system/signal_type.hpp` (extracted from signals to avoid a pins↔signals include cycle).
**Pins** are either NC (`signal() == nullptr`) or connected to exactly one signal. The ODS importer creates a Pin for every row that has a non-empty pin name, even when the signal column is empty or `"NC"` — the pin stays in the Part as NC. `restore` replaces `Tui::sys` entirely (`unique_ptr::reset`). Names are stored as-is — must not contain TAB or newline (true for the EE netlists we ingest). Format is versioned by the `# essim system snapshot v1` header for future compatibility.
**Connector types & transforms**: every `Part` carries a `connector_type` string (default `""`, set via the `set-type` command — inline `set-type m p kind` or bare which opens a TUI screen with module menu, part filter+menu, type input, list of types already in use, and an Apply button). When `connect` validates a pair, it consults `TransformRegistry::lookup(p1->connector_type, p2->connector_type)` (defined in `src/system/transform.{hpp,cpp}`) — both directions of the pair are tried. If neither is registered, an `IdentityTransform` fallback wires each pin of A to the same-name pin of B (when present). The resulting `(Pin*, Pin*)` list and the transform's name are stored on the `Connection` (`pin_map`, `transform_name`). To register a real transform: define a `Transform` subclass in `transform.cpp` and call `TransformRegistry::get().add("kindA", "kindB", new MyTransform())` at init — there's no startup hook for this yet, so a small `RegisterBuiltinTransforms()` helper is the natural place to add when more types appear.

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@@ -26,17 +26,40 @@ FetchContent_MakeAvailable(ftxui)
find_package(libzip REQUIRED)
find_package(pugixml REQUIRED)
file(GLOB_RECURSE ALL_SOURCES "src/*.cpp")
# Library target = everything except main.cpp; reused by `essim` and `essim_tests`.
file(GLOB_RECURSE LIB_SOURCES "src/*.cpp")
list(REMOVE_ITEM LIB_SOURCES "${CMAKE_CURRENT_SOURCE_DIR}/src/main.cpp")
add_executable(essim ${ALL_SOURCES})
target_include_directories(essim PRIVATE ${CMAKE_CURRENT_SOURCE_DIR}/src)
target_link_libraries(essim
PRIVATE
add_library(essim_lib STATIC ${LIB_SOURCES})
target_include_directories(essim_lib PUBLIC ${CMAKE_CURRENT_SOURCE_DIR}/src)
target_link_libraries(essim_lib
PUBLIC
ftxui::screen
ftxui::dom
ftxui::component
libzip::zip
pugixml::pugixml
)
add_executable(essim src/main.cpp)
target_link_libraries(essim PRIVATE essim_lib)
# Tests
include(CTest)
if(BUILD_TESTING)
set(CMAKE_POLICY_VERSION_MINIMUM 3.5)
FetchContent_Declare(doctest
GIT_REPOSITORY https://github.com/doctest/doctest.git
GIT_TAG v2.4.11
GIT_SHALLOW TRUE
)
FetchContent_MakeAvailable(doctest)
unset(CMAKE_POLICY_VERSION_MINIMUM)
file(GLOB TEST_SOURCES "tests/*.cpp")
if(TEST_SOURCES)
add_executable(essim_tests ${TEST_SOURCES})
target_link_libraries(essim_tests PRIVATE essim_lib doctest::doctest)
add_test(NAME essim_tests COMMAND essim_tests)
endif()
endif()

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@@ -101,14 +101,14 @@ void ImportOds::parse(Signals *signals)
const std::string &pin_name = cells[0];
const std::string &sig_name = cells[1];
if (pin_name.empty() || sig_name.empty()) continue;
if (pin_name.empty()) continue;
Pin *pin = new Pin(pin_name);
try { prt->add(pin); }
catch (const std::exception &) { delete pin; continue; }
// "NC" = Not Connected: keep the pin in the part, no signal hookup.
if (sig_name == "NC") continue;
// NC: empty signal name OR explicit "NC" → keep the pin, no hookup.
if (sig_name.empty() || sig_name == "NC") continue;
Signal *s = signals->merge(sig_name);
s->add(pin);

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@@ -49,6 +49,12 @@ bool save_system(const System *sys, const std::string &filename, std::string &er
f << "N\t" << pin->name << "\t" << (s ? s->name : "") << "\n";
}
}
// Signal types: only persist non-default (Other) overrides.
for (auto &skv : *mod->signals) {
Signal *s = skv.second;
if (s->type == SignalType::Other) continue;
f << "S\t" << s->name << "\t" << signal_type_name(s->type) << "\n";
}
}
for (auto &ckv : *sys->connections()) {
@@ -122,6 +128,14 @@ System *restore_system(const std::string &filename, std::string &error)
s->add(pin);
pin->connect(s);
}
} else if (tag == "S") {
if (!cur_mod) return fail("S outside module");
if (fs.size() < 3) return fail("S needs <signal> <type>");
Signal *s;
try { s = cur_mod->signals->get(fs[1]); }
catch (const std::exception &) { continue; }
SignalType t;
if (signal_type_from_name(fs[2], t)) s->type = t;
} else if (tag == "C") {
if (fs.size() < 7) return fail("C needs <name> <m1> <p1> <m2> <p2> <transform>");
Module *m1 = sys->modules()->get(fs[2]);

55
src/system/pin_role.cpp Normal file
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@@ -0,0 +1,55 @@
#include "pin_role.hpp"
#include <cctype>
#include <exception>
#include <string>
// VPX 3U built-in pin role tables.
//
// NOTE: real VITA 46 pin roles are connector-/profile-specific (data lanes,
// power planes, GND chassis, etc.). The placeholders below are intentionally
// minimal — fill in the actual per-(col,row) roles for your design when the
// reference is available; the rest of the chain (set-type → verify) is
// already wired through this single function.
namespace {
// Quick char column dispatch — returns Other when the column isn't recognised.
SignalType vpx_3u_role(char /*col*/, int /*row*/, int /*connector_idx*/) {
// TODO: encode the real layout. Right now everything is "other"; verify()
// therefore reports nothing for VPX until this table is filled in.
return SignalType::Other;
}
bool parse_pin(const std::string &s, char &col, int &row) {
if (s.size() < 2) return false;
if (!std::isalpha((unsigned char)s[0])) return false;
for (size_t i = 1; i < s.size(); ++i)
if (!std::isdigit((unsigned char)s[i])) return false;
col = (char)std::toupper((unsigned char)s[0]);
try { row = std::stoi(s.substr(1)); }
catch (const std::exception &) { return false; }
return true;
}
} // namespace
SignalType pin_role(const std::string &kind, const std::string &pin_name)
{
if (kind.empty()) return SignalType::Other;
char col; int row;
if (!parse_pin(pin_name, col, row)) return SignalType::Other;
int idx = -1;
bool is_vpx_3u = false;
if (kind.rfind("vpx-3u-bkp-p", 0) == 0
|| kind.rfind("vpx-3u-payload-p", 0) == 0) {
is_vpx_3u = true;
const std::string suffix = kind.substr(kind.size() - 1);
try { idx = std::stoi(suffix); } catch (const std::exception &) {}
}
if (is_vpx_3u && idx >= 0) return vpx_3u_role(col, row, idx);
return SignalType::Other;
}

18
src/system/pin_role.hpp Normal file
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@@ -0,0 +1,18 @@
#ifndef _PIN_ROLE_HPP_
#define _PIN_ROLE_HPP_
#include "signal_type.hpp"
#include <string>
// For a given connector type and pin position, return the expected SignalType
// (Power / GndShield / Other). Used at `set-type` to populate each pin's
// `expected_signal_type`, then later by `verify` to flag mismatches between
// the connector's expectation and the actual signal's inferred/declared type.
//
// Returns SignalType::Other for unknown connector types or unmatched pins —
// caller can treat that as "no expectation, no constraint".
SignalType pin_role(const std::string &connector_type,
const std::string &pin_name);
#endif // _PIN_ROLE_HPP_

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@@ -2,7 +2,9 @@
#include "parts.hpp"
#include "signals.hpp"
Pin::Pin(std::string name) : SystemElement(name), sig(nullptr), prnt(nullptr) {};
Pin::Pin(std::string name)
: SystemElement(name), sig(nullptr), prnt(nullptr),
expected_signal_type(SignalType::Other) {};
bool Pin::connected()
{

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@@ -1,6 +1,7 @@
#ifndef _PINS_HPP_
#define _PINS_HPP_
#include "signal_type.hpp"
#include "syselmts.hpp"
#pragma once
@@ -15,6 +16,7 @@ class Pin : public SystemElement
public:
Pin(std::string name);
Part *prnt; ///< Pointer to the parent part.
SignalType expected_signal_type; ///< Set from connector_type at set-type.
bool connected();
Signal *signal() const { return sig; }
void connect(Signal *signal);

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@@ -0,0 +1,12 @@
#ifndef _SIGNAL_TYPE_HPP_
#define _SIGNAL_TYPE_HPP_
#include <string>
enum class SignalType { Power, GndShield, Other };
const char *signal_type_name(SignalType t);
bool signal_type_from_name(const std::string &s, SignalType &out);
SignalType infer_signal_type(const std::string &signal_name);
#endif // _SIGNAL_TYPE_HPP_

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@@ -2,7 +2,70 @@
#include "signals.hpp"
#include "parts.hpp"
Signal::Signal(std::string name) : SystemElementContainer<Pin>(name), prnt(nullptr) {};
#include <algorithm>
#include <cctype>
#include <cstring>
const char *signal_type_name(SignalType t) {
switch (t) {
case SignalType::Power: return "power";
case SignalType::GndShield: return "gnd";
case SignalType::Other: return "other";
}
return "other";
}
bool signal_type_from_name(const std::string &s, SignalType &out) {
std::string l = s;
std::transform(l.begin(), l.end(), l.begin(),
[](unsigned char c) { return std::tolower(c); });
if (l == "power" || l == "p") { out = SignalType::Power; return true; }
if (l == "gnd" || l == "g" || l == "shield" || l == "ground")
{ out = SignalType::GndShield; return true; }
if (l == "other" || l == "o" || l == "signal")
{ out = SignalType::Other; return true; }
return false;
}
// Heuristic. Names like GND, GNDA, SHIELD, CHASSIS → GndShield.
// Names containing PWR/POWER/VCC/VDD/VEE/VSS, or matching V±N or +N.NV
// patterns, or starting with VS_/VS3_ → Power. Else Other.
SignalType infer_signal_type(const std::string &name) {
if (name.empty()) return SignalType::Other;
std::string u = name;
std::transform(u.begin(), u.end(), u.begin(),
[](unsigned char c) { return std::toupper(c); });
auto contains = [&](const char *needle) {
return u.find(needle) != std::string::npos;
};
auto starts_with = [&](const char *needle) {
return u.rfind(needle, 0) == 0;
};
if (u == "GND" || u == "GROUND") return SignalType::GndShield;
if (starts_with("GND_")
|| (starts_with("GND") && u.size() >= 4
&& std::isalpha((unsigned char)u[3]))) {
return SignalType::GndShield;
}
if (contains("SHIELD") || contains("CHASSIS") || contains("EARTH"))
return SignalType::GndShield;
if (contains("PWR") || contains("POWER")
|| contains("VCC") || contains("VDD") || contains("VEE") || contains("VSS")
|| starts_with("VS_") || starts_with("VS1_") || starts_with("VS2_")
|| starts_with("VS3_") || starts_with("VS4_")
|| starts_with("VBAT") || starts_with("VBUS")
|| starts_with("+") || starts_with("-")) {
return SignalType::Power;
}
return SignalType::Other;
}
Signal::Signal(std::string name)
: SystemElementContainer<Pin>(name), prnt(nullptr),
type(infer_signal_type(name)) {};
void Signal::add(Pin *pin)
{

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@@ -1,6 +1,7 @@
#ifndef _SIGNALS_HPP_
#define _SIGNALS_HPP_
#include "signal_type.hpp"
#include "syselmts.hpp"
#include "pins.hpp"
@@ -11,6 +12,7 @@ class Signal : public SystemElementContainer<Pin>
{
public:
Signals *prnt; ///< Pointer to the parent signals object.
SignalType type;
Signal(std::string name);
void add(Pin *pin) override;
};

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@@ -5,6 +5,8 @@
#include "system/modules.hpp"
#include "system/parts.hpp"
#include "system/persist.hpp"
#include "system/pin_role.hpp"
#include "system/pins.hpp"
#include "system/signals.hpp"
#include "system/system.hpp"
#include "system/transform.hpp"
@@ -152,6 +154,66 @@ void Tui::RegisterCommands() {
"replace the current system with a saved snapshot",
};
commands["verify"] = { {}, [this](auto &) {
if (!sys) { Print("no system: run 'new' first."); return; }
int checked = 0;
int mismatches = 0;
for (auto &mkv : *sys->modules()) {
Module *mod = mkv.second;
for (auto &pkv : *mod) {
Part *prt = pkv.second;
if (prt->connector_type.empty()) continue;
for (auto &nkv : *prt) {
Pin *pin = nkv.second;
++checked;
SignalType expected = pin->expected_signal_type;
if (expected == SignalType::Other) continue;
Signal *s = pin->signal();
SignalType actual = s ? s->type : SignalType::Other;
if (actual == expected) continue;
++mismatches;
std::string sig_label = s ? s->name : std::string("(NC)");
Print(" " + mod->name + "/" + prt->name + "/" + pin->name
+ ": expected " + signal_type_name(expected)
+ ", got " + signal_type_name(actual)
+ " (signal: " + sig_label + ")");
}
}
}
Print("verify: " + std::to_string(mismatches) + " mismatch(es) over "
+ std::to_string(checked) + " typed pin(s).");
}, true,
"check that each pin's connected signal matches its connector_type's expected role" };
commands["set-signal-type"] = {
{{"module", Completion::None},
{"signal name", Completion::None},
{"type [power|gnd|other]", Completion::None}},
[this](const std::vector<std::string> &args) {
if (!sys) { Print("no system: run 'new' first."); return; }
Module *mod;
try { mod = sys->modules()->get(args[0]); }
catch (const std::exception &) {
Print("unknown module: " + args[0]); return;
}
Signal *sig;
try { sig = mod->signals->get(args[1]); }
catch (const std::exception &) {
Print("unknown signal: " + mod->name + "/" + args[1]); return;
}
SignalType t;
if (!signal_type_from_name(args[2], t)) {
Print("type must be one of: power, gnd, other (got: " + args[2] + ")");
return;
}
sig->type = t;
Print(mod->name + "/" + sig->name + ": signal type = "
+ signal_type_name(t));
},
/*prompt_for_missing=*/ true,
"override the auto-detected signal type (power | gnd | other)",
};
commands["set-type"] = {
{{"module", Completion::None},
{"part (name or pattern)", Completion::None},
@@ -205,6 +267,8 @@ void Tui::RegisterCommands() {
return;
}
prt->connector_type = args[2];
for (auto &kv : *prt)
kv.second->expected_signal_type = pin_role(args[2], kv.first);
Print(mod->name + "/" + prt->name + ": connector_type = "
+ (args[2].empty() ? "(none)" : args[2]));
},

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@@ -106,7 +106,7 @@ Component Tui::BuildExploreScreen() {
std::vector<std::pair<std::string, std::string>> rows;
for (auto &pin_kv : *p) {
Signal *s = pin_kv.second->signal();
rows.emplace_back(pin_kv.first, s ? s->name : std::string(""));
rows.emplace_back(pin_kv.first, s ? s->name : std::string("(NC)"));
}
std::sort(rows.begin(), rows.end(),
[](const auto &a, const auto &b) { return NaturalLess(a.first, b.first); });
@@ -123,7 +123,7 @@ Component Tui::BuildExploreScreen() {
Signal *s = cur_mod->signals->get(cname);
explore_header = cur_mod->name + "/" + s->name
+ "" + std::to_string(s->size())
+ " pins";
+ " pins • type: " + signal_type_name(s->type);
std::vector<std::string> rows;
for (auto &pin_kv : *s) {
Pin *pin = pin_kv.second;

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@@ -3,6 +3,8 @@
#include "system/modules.hpp"
#include "system/parts.hpp"
#include "system/pin_role.hpp"
#include "system/pins.hpp"
#include "system/system.hpp"
#include "system/transform_vpx.hpp"
@@ -51,6 +53,8 @@ Component Tui::BuildSettypeScreen() {
return;
}
prt->connector_type = settype_type;
for (auto &kv : *prt)
kv.second->expected_signal_type = pin_role(settype_type, kv.first);
std::string msg = mod->name + "/" + prt->name + " = "
+ (settype_type.empty() ? "(none)" : settype_type);
settype_status = "applied: " + msg;

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@@ -41,22 +41,6 @@ void Tui::CancelPending() {
Print("(cancelled)");
}
std::vector<std::string> Tui::Tokenize(const std::string &s) {
std::vector<std::string> out;
std::string cur;
bool in_q = false;
for (char c : s) {
if (c == '"') { in_q = !in_q; continue; }
if (!in_q && std::isspace((unsigned char)c)) {
if (!cur.empty()) { out.push_back(std::move(cur)); cur.clear(); }
} else {
cur.push_back(c);
}
}
if (!cur.empty()) out.push_back(std::move(cur));
return out;
}
void Tui::Submit() {
if (!pending.empty()) {
if (input.empty()) { Print("(empty — Esc to cancel)"); return; }

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@@ -117,7 +117,6 @@ private:
void LoadHistory();
void AppendHistory(const std::string &cmd);
void Source(const std::string &filename);
static std::vector<std::string> Tokenize(const std::string &s);
// Completion (completion.cpp)
void CompleteCommand(size_t start = 0);

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@@ -52,3 +52,19 @@ std::string LongestCommonPrefix(const std::vector<std::string> &v) {
}
return lcp;
}
std::vector<std::string> Tokenize(const std::string &s) {
std::vector<std::string> out;
std::string cur;
bool in_q = false;
for (char c : s) {
if (c == '"') { in_q = !in_q; continue; }
if (!in_q && std::isspace((unsigned char)c)) {
if (!cur.empty()) { out.push_back(std::move(cur)); cur.clear(); }
} else {
cur.push_back(c);
}
}
if (!cur.empty()) out.push_back(std::move(cur));
return out;
}

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@@ -14,4 +14,7 @@ bool NaturalLess(const std::string &a, const std::string &b);
std::string LongestCommonPrefix(const std::vector<std::string> &v);
// Whitespace tokeniser with `"…"` quoting (preserved-as-content).
std::vector<std::string> Tokenize(const std::string &s);
#endif // _TUI_HELPERS_HPP_

2
tests/doctest_main.cpp Normal file
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@@ -0,0 +1,2 @@
#define DOCTEST_CONFIG_IMPLEMENT_WITH_MAIN
#include <doctest/doctest.h>

71
tests/test_helpers.cpp Normal file
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@@ -0,0 +1,71 @@
#include <doctest/doctest.h>
#include "tui/tui_helpers.hpp"
#include <algorithm>
#include <vector>
TEST_CASE("ToLower") {
CHECK(ToLower("ABC") == "abc");
CHECK(ToLower("aBc 123") == "abc 123");
CHECK(ToLower("") == "");
}
TEST_CASE("LongestCommonPrefix") {
CHECK(LongestCommonPrefix({}) == "");
CHECK(LongestCommonPrefix({"foo"}) == "foo");
CHECK(LongestCommonPrefix({"foo", "foobar", "foobaz"}) == "foo");
CHECK(LongestCommonPrefix({"abc", "xyz"}) == "");
CHECK(LongestCommonPrefix({"abc", "abc"}) == "abc");
}
TEST_CASE("Tokenize splits on whitespace") {
CHECK(Tokenize("").empty());
CHECK(Tokenize(" ").empty());
auto t = Tokenize("a b c");
CHECK(t == std::vector<std::string>{"a", "b", "c"});
}
TEST_CASE("Tokenize preserves quoted spaces") {
auto t = Tokenize("load \"my mod\" /tmp/x mentor");
CHECK(t == std::vector<std::string>{"load", "my mod", "/tmp/x", "mentor"});
}
TEST_CASE("Tokenize handles tabs as separators") {
auto t = Tokenize("a\tb\tc");
CHECK(t == std::vector<std::string>{"a", "b", "c"});
}
TEST_CASE("NaturalLess: numeric runs sort numerically") {
CHECK(NaturalLess("J1", "J2"));
CHECK(NaturalLess("J2", "J10"));
CHECK(NaturalLess("J9", "J10"));
CHECK(!NaturalLess("J10", "J2"));
CHECK(!NaturalLess("J10", "J10"));
}
TEST_CASE("NaturalLess: case insensitive for letters") {
CHECK(NaturalLess("abc", "ABD"));
CHECK(!NaturalLess("ABD", "abc"));
CHECK(!NaturalLess("abc", "ABC"));
}
TEST_CASE("NaturalLess: leading zeros tie-break") {
CHECK(NaturalLess("J01", "J1"));
CHECK(!NaturalLess("J1", "J01"));
}
TEST_CASE("NaturalLess: produces a sorted order over a connector-style list") {
std::vector<std::string> v = {"J22", "J1", "J10", "J2", "P100", "P21", "P2"};
std::sort(v.begin(), v.end(), NaturalLess);
CHECK(v == std::vector<std::string>{"J1", "J2", "J10", "J22", "P2", "P21", "P100"});
}
TEST_CASE("NaturalLess: total order axioms") {
// !(a < a)
CHECK(!NaturalLess("foo", "foo"));
CHECK(!NaturalLess("J10", "J10"));
// a < b ⇒ !(b < a)
CHECK(NaturalLess("J1", "J2"));
CHECK(!NaturalLess("J2", "J1"));
}

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#include <doctest/doctest.h>
#include "system/connect.hpp"
#include "system/modules.hpp"
#include "system/parts.hpp"
#include "system/persist.hpp"
#include "system/pins.hpp"
#include "system/signals.hpp"
#include "system/system.hpp"
#include <filesystem>
#include <memory>
#include <string>
namespace {
std::string tmp_path(const std::string &name) {
return (std::filesystem::temp_directory_path() / name).string();
}
// Build a tiny system with two modules, parts, signals, and one connection
// with a non-trivial pin_map. Used for the round-trip test.
std::unique_ptr<System> make_fixture() {
auto sys = std::make_unique<System>();
Module *bkp = sys->modules()->merge("BKP");
Module *pl = sys->modules()->merge("PL");
Part *p1 = new Part("U1");
p1->connector_type = "vpx-3u-bkp-p0";
bkp->add(p1);
Part *p2 = new Part("J1");
p2->connector_type = "vpx-3u-payload-p0";
pl->add(p2);
auto add_pin = [](Part *p, const std::string &name,
Module *mod, const std::string &signal_name) -> Pin* {
Pin *pin = new Pin(name);
p->add(pin);
if (!signal_name.empty()) {
Signal *s = mod->signals->merge(signal_name);
s->add(pin);
pin->connect(s);
}
return pin;
};
Pin *a1_bkp = add_pin(p1, "A1", bkp, "GND");
Pin *b1_bkp = add_pin(p1, "B1", bkp, "VCC");
/*Pin *nc_bkp =*/ add_pin(p1, "C1", bkp, ""); // NC
Pin *a1_pl = add_pin(p2, "A1", pl, "GND");
Pin *c1_pl = add_pin(p2, "C1", pl, "VCC");
Connection *c = new Connection("BKP/U1 <-> PL/J1", bkp, p1, pl, p2);
c->transform_name = "vpx-3u-p0";
c->pin_map.emplace_back(a1_bkp, a1_pl);
c->pin_map.emplace_back(b1_bkp, c1_pl);
sys->connections()->add(c);
return sys;
}
} // namespace
TEST_CASE("save+restore round-trip preserves modules, parts, types, signals, NC") {
auto sys = make_fixture();
std::string path = tmp_path("essim_roundtrip.txt");
std::string err;
REQUIRE(save_system(sys.get(), path, err));
System *restored_raw = restore_system(path, err);
REQUIRE(restored_raw != nullptr);
std::unique_ptr<System> restored(restored_raw);
std::filesystem::remove(path);
CHECK(restored->modules()->size() == 2);
Module *bkp = restored->modules()->get("BKP");
Module *pl = restored->modules()->get("PL");
REQUIRE(bkp); REQUIRE(pl);
Part *p1 = bkp->get("U1");
Part *p2 = pl->get("J1");
REQUIRE(p1); REQUIRE(p2);
CHECK(p1->connector_type == "vpx-3u-bkp-p0");
CHECK(p2->connector_type == "vpx-3u-payload-p0");
CHECK(p1->size() == 3);
CHECK(p2->size() == 2);
Pin *a1 = p1->get("A1");
Pin *c1_nc = p1->get("C1");
REQUIRE(a1); REQUIRE(c1_nc);
REQUIRE(a1->signal());
CHECK(a1->signal()->name == "GND");
CHECK(c1_nc->signal() == nullptr); // NC preserved
}
TEST_CASE("save+restore preserves signal type overrides") {
auto sys = make_fixture();
// Force a non-default override on a signal that auto-infers as Other.
Signal *vcc = sys->modules()->get("BKP")->signals->get("VCC");
REQUIRE(vcc);
CHECK(vcc->type == SignalType::Power); // auto-detected from "VCC"
Signal *gnd = sys->modules()->get("BKP")->signals->get("GND");
REQUIRE(gnd);
CHECK(gnd->type == SignalType::GndShield);
std::string path = tmp_path("essim_signal_type.txt");
std::string err;
REQUIRE(save_system(sys.get(), path, err));
std::unique_ptr<System> restored(restore_system(path, err));
REQUIRE(restored);
std::filesystem::remove(path);
Signal *r_vcc = restored->modules()->get("BKP")->signals->get("VCC");
Signal *r_gnd = restored->modules()->get("BKP")->signals->get("GND");
CHECK(r_vcc->type == SignalType::Power);
CHECK(r_gnd->type == SignalType::GndShield);
}
TEST_CASE("save+restore preserves connections and pin_map") {
auto sys = make_fixture();
std::string path = tmp_path("essim_conn.txt");
std::string err;
REQUIRE(save_system(sys.get(), path, err));
std::unique_ptr<System> restored(restore_system(path, err));
REQUIRE(restored);
std::filesystem::remove(path);
CHECK(restored->connections()->size() == 1);
Connection *c = restored->connections()->get("BKP/U1 <-> PL/J1");
REQUIRE(c);
CHECK(c->transform_name == "vpx-3u-p0");
CHECK(c->pin_map.size() == 2);
// Endpoints point into the restored system, not dangling.
Module *bkp = restored->modules()->get("BKP");
Module *pl = restored->modules()->get("PL");
CHECK(c->m1 == bkp);
CHECK(c->m2 == pl);
CHECK(c->p1 == bkp->get("U1"));
CHECK(c->p2 == pl->get("J1"));
// Verify a specific wire pair.
Pin *a1_bkp = bkp->get("U1")->get("A1");
bool found_a1 = false;
for (auto &wp : c->pin_map) {
if (wp.first == a1_bkp) {
CHECK(wp.second == pl->get("J1")->get("A1"));
found_a1 = true;
}
}
CHECK(found_a1);
}
TEST_CASE("restore returns nullptr on bogus path") {
std::string err;
System *r = restore_system("/this/path/should/not/exist", err);
CHECK(r == nullptr);
CHECK(!err.empty());
}

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#include <doctest/doctest.h>
#include "system/signal_type.hpp"
TEST_CASE("signal_type_name round-trips with from_name") {
SignalType t;
REQUIRE(signal_type_from_name("power", t));
CHECK(t == SignalType::Power);
REQUIRE(signal_type_from_name("gnd", t));
CHECK(t == SignalType::GndShield);
REQUIRE(signal_type_from_name("other", t));
CHECK(t == SignalType::Other);
CHECK(std::string(signal_type_name(SignalType::Power)) == "power");
CHECK(std::string(signal_type_name(SignalType::GndShield)) == "gnd");
CHECK(std::string(signal_type_name(SignalType::Other)) == "other");
}
TEST_CASE("signal_type_from_name accepts aliases and is case-insensitive") {
SignalType t;
REQUIRE(signal_type_from_name("Power", t)); CHECK(t == SignalType::Power);
REQUIRE(signal_type_from_name("GROUND", t)); CHECK(t == SignalType::GndShield);
REQUIRE(signal_type_from_name("shield", t)); CHECK(t == SignalType::GndShield);
REQUIRE(signal_type_from_name("g", t)); CHECK(t == SignalType::GndShield);
REQUIRE(signal_type_from_name("p", t)); CHECK(t == SignalType::Power);
REQUIRE(signal_type_from_name("o", t)); CHECK(t == SignalType::Other);
}
TEST_CASE("signal_type_from_name rejects garbage") {
SignalType t;
CHECK(!signal_type_from_name("", t));
CHECK(!signal_type_from_name("foobar", t));
CHECK(!signal_type_from_name("pow", t));
}
TEST_CASE("infer_signal_type: GND family") {
CHECK(infer_signal_type("GND") == SignalType::GndShield);
CHECK(infer_signal_type("GROUND") == SignalType::GndShield);
CHECK(infer_signal_type("GND_RET") == SignalType::GndShield);
CHECK(infer_signal_type("GNDA") == SignalType::GndShield);
CHECK(infer_signal_type("CHASSIS_GND")== SignalType::GndShield);
CHECK(infer_signal_type("SHIELD") == SignalType::GndShield);
CHECK(infer_signal_type("EARTH") == SignalType::GndShield);
}
TEST_CASE("infer_signal_type: power family") {
CHECK(infer_signal_type("VCC") == SignalType::Power);
CHECK(infer_signal_type("VDD_3V3") == SignalType::Power);
CHECK(infer_signal_type("PWR_VS3_5V0") == SignalType::Power);
CHECK(infer_signal_type("POWER_VBAT") == SignalType::Power);
CHECK(infer_signal_type("VS3_5V0") == SignalType::Power);
CHECK(infer_signal_type("+5V") == SignalType::Power);
CHECK(infer_signal_type("-12V") == SignalType::Power);
CHECK(infer_signal_type("VBAT_SENSE") == SignalType::Power);
}
TEST_CASE("infer_signal_type: other (data signals)") {
CHECK(infer_signal_type("CLK_50MHZ") == SignalType::Other);
CHECK(infer_signal_type("JTAG_TCK") == SignalType::Other);
CHECK(infer_signal_type("BPB_TO_SSU_RESET") == SignalType::Other);
CHECK(infer_signal_type("TEMP_01_RET") == SignalType::Other);
}
TEST_CASE("infer_signal_type: empty / weird names default to Other") {
CHECK(infer_signal_type("") == SignalType::Other);
CHECK(infer_signal_type("NC") == SignalType::Other);
CHECK(infer_signal_type("???") == SignalType::Other);
}

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#include <doctest/doctest.h>
#include "system/modules.hpp"
#include "system/parts.hpp"
#include "system/pins.hpp"
#include "system/signals.hpp"
#include "system/system.hpp"
#include "system/transform.hpp"
#include "system/transform_vpx.hpp"
#include <map>
#include <memory>
#include <set>
#include <string>
namespace {
// Build a Part with `pin_names` pins, attached to a fresh module so prnt
// chains exist (set-type's validation depends on pins; transforms don't).
Part *make_part(Module *mod, const std::string &part_name,
const std::vector<std::string> &pin_names) {
Part *p = new Part(part_name);
mod->add(p); // sets p->prnt = mod
for (const auto &n : pin_names) {
Pin *pin = new Pin(n);
p->add(pin);
}
return p;
}
// VPX 3U bkp pinout for connector P0: 9 cols A-I × 1 row of "1".
std::vector<std::string> bkp_p0_pins_row1() {
std::vector<std::string> out;
for (char c = 'A'; c <= 'I'; ++c) out.push_back(std::string(1, c) + "1");
return out;
}
std::vector<std::string> payload_p0_pins_row1() {
std::vector<std::string> out;
for (char c = 'A'; c <= 'G'; ++c) out.push_back(std::string(1, c) + "1");
return out;
}
} // namespace
TEST_CASE("VPX transform registered and looked up by name") {
auto &reg = TransformRegistry::get();
Transform *t = reg.lookup("vpx-3u-bkp-p0", "vpx-3u-payload-p0");
REQUIRE(t != reg.identity());
CHECK(t->name == "vpx-3u-p0");
}
TEST_CASE("VPX transform lookup is symmetric (both pair orders work)") {
auto &reg = TransformRegistry::get();
Transform *forward = reg.lookup("vpx-3u-bkp-p1", "vpx-3u-payload-p1");
Transform *backward = reg.lookup("vpx-3u-payload-p1", "vpx-3u-bkp-p1");
REQUIRE(forward != reg.identity());
CHECK(forward == backward);
}
TEST_CASE("VPX transform refuses non-matching pairs (returns identity)") {
auto &reg = TransformRegistry::get();
CHECK(reg.lookup("vpx-3u-bkp-p0", "vpx-3u-payload-p1") == reg.identity());
CHECK(reg.lookup("vpx-3u-bkp-p0", "vpx-3u-bkp-p0") == reg.identity());
CHECK(reg.lookup("foo", "bar") == reg.identity());
}
TEST_CASE("VPX P0 row 1 mapping matches the reference table") {
// bkp_to_payload PCORR[0] row 1: A→A, B→C, C→C, D→C, E→D, F→E, G→E, H→F, I→G.
Module mod("M");
Part *bkp = make_part(&mod, "BKP", bkp_p0_pins_row1());
Part *pl = make_part(&mod, "PL", payload_p0_pins_row1());
bkp->connector_type = "vpx-3u-bkp-p0";
pl->connector_type = "vpx-3u-payload-p0";
auto &reg = TransformRegistry::get();
Transform *t = reg.lookup(bkp->connector_type, pl->connector_type);
REQUIRE(t != reg.identity());
auto pin_map = t->apply(bkp, pl);
// Build (bkp_pin_name → payload_pin_name) map for easy assertion.
std::map<std::string, std::string> got;
for (auto &wp : pin_map) got[wp.first->name] = wp.second->name;
std::map<std::string, std::string> expected = {
{"A1","A1"}, {"B1","C1"}, {"C1","C1"}, {"D1","C1"},
{"E1","D1"}, {"F1","E1"}, {"G1","E1"}, {"H1","F1"},
{"I1","G1"},
};
CHECK(got == expected);
}
TEST_CASE("VPX transform skips pins missing on the target side") {
// bkp has all 9 cols; payload has only A1, B1 → most bkp pins should drop.
Module mod("M");
Part *bkp = make_part(&mod, "BKP", bkp_p0_pins_row1());
Part *pl = make_part(&mod, "PL", {"A1", "B1"});
bkp->connector_type = "vpx-3u-bkp-p0";
pl->connector_type = "vpx-3u-payload-p0";
auto &reg = TransformRegistry::get();
Transform *t = reg.lookup(bkp->connector_type, pl->connector_type);
auto pin_map = t->apply(bkp, pl);
std::set<std::string> bkp_used;
for (auto &wp : pin_map) bkp_used.insert(wp.first->name);
// A1 maps to A1 (present), B1→C1 (absent), C1→C1 (absent), D1→C1 (absent),
// E1→D1 (absent), …, the only target-pin that exists for the row 1 mapping
// besides A1 is none — so only A1 keeps its wire (B1 in payload isn't
// a target of any bkp col on row 1).
CHECK(bkp_used == std::set<std::string>{"A1"});
}
TEST_CASE("Identity fallback wires same-named pins") {
Module mod("M");
Part *a = make_part(&mod, "A", {"X1", "X2", "Y1"});
Part *b = make_part(&mod, "B", {"X1", "X2", "Z1"});
auto &reg = TransformRegistry::get();
auto pin_map = reg.identity()->apply(a, b);
std::set<std::string> wired;
for (auto &wp : pin_map) wired.insert(wp.first->name);
CHECK(wired == std::set<std::string>{"X1", "X2"});
}