François
c4afe877ce
Transport-agnostic (xfer callback) layer with a JEDEC-ID chip database and detect/read/erase_sector/program_page/program/verify. Standard opcode set, 3- and 4-byte addressing (4-byte command opcodes for parts over 16 MB). Seeded with the KCU105's MT25QU256 plus common Winbond/Macronix/ISSI/Micron parts. detect + read validated on the KCU105 over the proxy. erase/program are implemented but not yet hardware-tested (destructive on a config flash).
80 lines
3.4 KiB
C
80 lines
3.4 KiB
C
#ifndef _SPI_FLASH_H
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#define _SPI_FLASH_H
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/*
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* Generic SPI NOR flash layer (Phase 3).
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*
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* Transport-agnostic: it issues SPI commands through an `xfer` callback
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* (one CS-framed transaction), so it works over the BSCAN proxy, the
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* EXTEST bit-bang, or anything else that can clock bytes in and out.
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*
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* Standard JEDEC command set (RDID/READ/WREN/RDSR/PP/SE). Chips are
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* matched by JEDEC ID against a small built-in database; 3- and 4-byte
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* addressing are both supported (parts over 16 MB use the 4-byte
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* command opcodes, which are stateless regardless of the part's
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* address-mode latch).
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*/
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#include <stddef.h>
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#include <stdint.h>
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/* One CS-framed SPI transaction: clock out `txlen` MOSI bytes, then
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* read `rxlen` MISO bytes into `rx`. Either length may be 0. Returns 0
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* on success, <0 on error. */
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typedef int (*spi_flash_xfer_fn)(void *ctx,
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const uint8_t *tx, size_t txlen,
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uint8_t *rx, size_t rxlen);
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typedef struct {
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const char *name;
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uint8_t mfg_id; /* JEDEC byte 0 (manufacturer) */
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uint16_t dev_id; /* JEDEC bytes 1..2 ((b1 << 8) | b2) */
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uint32_t size_bytes; /* total capacity */
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uint32_t page_size; /* program granularity (typically 256) */
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uint32_t sector_size; /* erase granularity (typically 4096) */
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uint8_t addr_bytes; /* address width: 3 or 4 */
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uint8_t read_cmd; /* READ opcode (no dummy) */
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uint8_t pp_cmd; /* PAGE PROGRAM opcode */
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uint8_t erase_cmd; /* sector/subsector ERASE opcode */
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} spi_flash_chip;
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typedef struct {
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spi_flash_xfer_fn xfer; /* transport */
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void *ctx; /* opaque, passed to xfer */
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const spi_flash_chip *chip; /* matched part, set by detect */
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uint8_t jedec[3]; /* raw JEDEC ID from last detect */
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} spi_flash;
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/* Read the JEDEC ID (0x9F) and match the database.
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* Returns 0 if a known chip matched (sf->chip set), 1 if the ID was
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* read but is not in the database (sf->chip left NULL, sf->jedec set),
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* <0 on transport error. */
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int spi_flash_detect(spi_flash *sf);
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/* Read `len` bytes starting at `addr` into `buf`. Returns 0 / <0. */
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int spi_flash_read(spi_flash *sf, uint32_t addr, uint8_t *buf, size_t len);
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/* Erase the sector containing `addr` (WREN + ERASE + poll WIP). */
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int spi_flash_erase_sector(spi_flash *sf, uint32_t addr);
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/* Program at most one page at `addr` (`len` <= page_size and must not
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* cross a page boundary): WREN + PP + poll WIP. */
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int spi_flash_program_page(spi_flash *sf, uint32_t addr,
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const uint8_t *data, size_t len);
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/* Program `len` bytes from `addr`, splitting on page boundaries. The
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* target range must already be erased. */
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int spi_flash_program(spi_flash *sf, uint32_t addr,
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const uint8_t *data, size_t len);
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/* Read back and compare. Returns 0 if identical, 1 on first mismatch
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* (and reports its offset via *mismatch_off if non-NULL), <0 on error. */
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int spi_flash_verify(spi_flash *sf, uint32_t addr,
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const uint8_t *data, size_t len, uint32_t *mismatch_off);
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/* Built-in database access. */
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int spi_flash_chip_count(void);
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const spi_flash_chip *spi_flash_chip_by_index(int i);
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#endif
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