Files
bs_explorer/modules
François 3aad5e2308 jtag: driver-neutral JTAG_TCK_FREQ_KHZ clock (phase A)
One clock knob across probes instead of per-driver names:
- jtag_open mirrors JTAG_TCK_FREQ_KHZ into PROBE_FTDI_TCK_FREQ_KHZ for
  the Viveris FTDI driver (read-only at init); unset leaves the existing
  value untouched
- the Digilent driver reads JTAG_TCK_FREQ_KHZ directly instead of
  hardcoding 4 MHz (falls back to 4 MHz when unset)
- documented in probes.yaml; CLAUDE.md design note marks phase A done

FTDI path validated on the IGLOO2/FlashPro (250 kHz, mirror confirmed);
Digilent path not hardware-tested.

Co-Authored-By: Claude Opus 4.7 <noreply@anthropic.com>
2026-05-24 11:39:14 +02:00
..
2025-02-16 19:32:01 +01:00
2025-02-16 19:32:01 +01:00
2025-02-18 11:36:18 +01:00
2025-02-18 11:36:18 +01:00
2025-02-16 19:32:01 +01:00
2025-02-16 19:32:01 +01:00