François
9ad776268e
Restructure in anticipation of programming ARM CPUs (ARM7/9 via EmbeddedICE, e.g. over an Olimex ARM-USB-OCD); FPGA path unchanged. - modules/fpga -> modules/target; fpga_target -> jtag_target with a `kind` (fpga|cpu) and grouped fpga/cpu sub-structs; data/targets.yaml (env BS_TARGETS); API target_*; commands target_list/target_info (kind-aware). Add arm7/arm9 families, arm_flash prog, embeddedice debug, and cpu fields (ram_base/size, flash_base/size). - new program/: `program <dev> <file>` dispatches by the target's prog (svf wired; proxy_spi points at the flash workflow; arm_flash -> arm_debug). - new arm_debug/: EmbeddedICE halt/resume/mem + arm_flash backend declared, not implemented yet. - bscan_* take const jtag_target* and read the fpga sub-struct. - data/probes.yaml: arm-usb-ocd profile slot; data/targets.yaml: an ARM7 example entry. Docs + an ARM-debug design note in CLAUDE.md. Builds; FPGA path re-validated on the IGLOO2 (target_list shows the CPU example; jtag_open/autoinit/program 0 <svf> all work). Co-Authored-By: Claude Opus 4.7 <noreply@anthropic.com>
39 lines
1.7 KiB
YAML
39 lines
1.7 KiB
YAML
# bs_explorer probe-config profiles
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#
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# Loaded at runtime by src/modules/probes/, layered on top of the built-in
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# config.script defaults. Looked up CWD-relative (run from the repo
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# root), or via $BS_PROBES.
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#
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# defaults: applied on every `jtag_open` (restores a known baseline
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# so opening without a profile is deterministic).
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# profiles: named override sets; select with `jtag_open <idx> <name>`.
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#
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# Each key is a probe variable (see modules/config/config.script for the
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# full list); each value is what `set <KEY> <value>` would assign.
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defaults:
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# Baseline for a standalone FT2232H JTAG probe: drive ADBUS4 as the
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# "JTAG buffer enable" output (matches the built-in default).
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PROBE_FTDI_SET_PIN_DIR_ADBUS4: 1
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# Driver-neutral JTAG clock in kHz. Honoured by the FTDI driver (mapped
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# to PROBE_FTDI_TCK_FREQ_KHZ at open) and our Digilent driver. Leave it
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# out to keep each driver's own default (FTDI 1000, Digilent 4000).
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# JTAG_TCK_FREQ_KHZ: 1000
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profiles:
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# Embedded FlashPro on Microsemi eval kits (FT4232H, JTAG on channel A
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# = probe index 0). Its ADBUS4 must be left high-Z or the chain stays
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# silent. Usage: jtag_open 0 flashpro
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flashpro:
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PROBE_FTDI_SET_PIN_DIR_ADBUS4: 0
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# Plain FT2232H probe: nothing to override beyond the defaults.
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ft2232h: {}
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# Olimex ARM-USB-OCD (FT2232, OpenOCD-class) — for ARM CPU targets.
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# The core MPSSE JTAG pins (TCK/TDI/TDO/TMS = ADBUS0-3) match the
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# defaults; the control pins (nTRST, nSRST, output-buffer enable) are
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# board-specific. TODO: fill the TRST/SRST/buffer pin numbers from the
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# Olimex schematic / OpenOCD's interface config before driving a target.
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arm-usb-ocd: {}
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