# bs_explorer JTAG target registry (FPGAs and CPUs)
#
# Loaded at runtime by src/modules/target/. Looked up relative to the
# current directory (run bs_explorer from the repo root), or via
# $BS_TARGETS.
#
# One flat entry per device under `targets:`. `kind` selects which
# fields apply. Common fields:
#   name              human-readable part name (quoted)
#   idcode            JTAG IDCODE pattern (hex)
#   idcode_mask       bits compared when matching (0x0FFFFFFF masks a
#                     version nibble); default 0xFFFFFFFF
#   kind              fpga | cpu                       (default fpga)
#   family            xilinx_7/us/usp | microsemi_igloo2/smartfusion2 |
#                     lattice_machxo2/3 | arm7 | arm9
#   ir_length         IR width in bits
#   prog              backend: proxy_spi | svf | arm_flash | none.
#                     Omit to infer (proxy -> proxy_spi; Microsemi/Lattice
#                     -> svf; cpu with a debug iface -> arm_flash).
#   max_tck_khz       max safe JTAG TCK in kHz; jtag_autoinit clamps and
#                     re-opens if exceeded (omit / 0 = unspecified)
#
# FPGA fields (kind: fpga):
#   bsdl              basename of the .bsd in data/bsdl_files/
#   ir_cfg_in / ir_user1 / ir_jprogram / ir_jstart / ir_jshutdown /
#   ir_isc_disable    private IR opcodes (hex; from the BSDL on Xilinx)
#   proxy_bitstream   basename of the proxy .bit in data/bscan_proxies/
#   caveats           space/comma-separated flags: cclk_via_startup
#
# CPU fields (kind: cpu):
#   debug             debug transport: embeddedice (ARM7/ARM9)
#   ram_base/ram_size on-chip work-RAM for the flash loader (hex)
#   flash_base/flash_size  on-chip flash region (hex)

targets:
  # Xilinx Kintex UltraScale+ XCKU15P
  # IDCODE / opcodes from data/bsdl_files/xcku15p_ffve1517.bsd, IR length 6.
  - name:           "Xilinx Kintex UltraScale+ XCKU15P"
    kind:           fpga
    idcode:         0x04A56093
    idcode_mask:    0x0FFFFFFF
    family:         xilinx_usp
    bsdl:           xcku15p_ffve1517.bsd
    ir_length:      6
    ir_cfg_in:      0x05
    ir_user1:       0x02
    ir_jprogram:    0x0B
    ir_jstart:      0x0C
    ir_jshutdown:   0x0D
    ir_isc_disable: 0x16
    caveats:        cclk_via_startup
    prog:           proxy_spi
    # proxy_bitstream not yet built for this part (see doc/tutorial.md, Phase 2.5)

  # Xilinx Kintex UltraScale XCKU040 (KCU105 eval board)
  - name:            "Xilinx Kintex UltraScale XCKU040"
    kind:            fpga
    idcode:          0x03822093
    idcode_mask:     0x0FFFFFFF
    family:          xilinx_us
    bsdl:            xcku040_ffva1156.bsd
    ir_length:       6
    ir_cfg_in:       0x05
    ir_user1:        0x02
    ir_jprogram:     0x0B
    ir_jstart:       0x0C
    ir_jshutdown:    0x0D
    ir_isc_disable:  0x16
    proxy_bitstream: bscan_spi_xcku040.bit
    caveats:         cclk_via_startup
    prog:            proxy_spi

  # Microsemi IGLOO2 M2GL010T (M2GL-EVAL-KIT)
  # IDCODE / IR length from data/bsdl_files/m2gl010t-fg484.bsd
  #   IDCODE_REGISTER "XXXX1111100000000011000111001111" -> 0x0F8031CF
  #   (top nibble = silicon revision, masked off). Programmed by playing
  #   an SVF exported from Libero, not the Xilinx proxy path.
  - name:           "Microsemi IGLOO2 M2GL010T"
    kind:           fpga
    idcode:         0x0F8031CF
    idcode_mask:    0x0FFFFFFF
    family:         microsemi_igloo2
    bsdl:           m2gl010t-fg484.bsd
    ir_length:      8
    prog:           svf

  # --- CPU: NXP LPC2103 (ARM7TDMI-S) --------------------------------
  # IDCODE 0x4F1F0F0F detected on hardware (Olimex ARM-USB-OCD). That's
  # the generic ARM7TDMI-S debug-TAP id, shared by many ARM7 parts, so
  # the masked match covers any ARM7TDMI-S — adjust ram/flash per part.
  # LPC2103: 32 KB flash @0x0, 8 KB SRAM @0x40000000. The arm_flash
  # backend is not implemented yet (see src/modules/arm_debug/).
  - name:           "NXP LPC2103 (ARM7TDMI-S)"
    kind:           cpu
    idcode:         0x4F1F0F0F
    idcode_mask:    0x0FFFFFFF
    family:         arm7
    ir_length:      4
    debug:          embeddedice
    ram_base:       0x40000000
    ram_size:       0x2000
    flash_base:     0x0
    flash_size:     0x8000
    prog:           arm_flash