restructure: code+libs under src/, runtime resources under data/

Separate the two concerns the repo root was mixing:
- src/   — bs/, modules/, libs/ (code + vendored libs)
- data/  — fpga_registry.yaml, probes.yaml, bsdl_files/, bscan_proxies/,
           scripts/ (everything the tool reads at runtime, CWD-relative)
- doc/   — kept at the root

CMake: repoint DIR_MODULES/DIR_LIBS and add_subdirectory at src/; emit
the binary at the build/ root (build/bs) via CMAKE_RUNTIME_OUTPUT_DIRECTORY
instead of the nested build/src/bs/. The jtag_core ../../libs path still
resolves since modules and libs moved together.

Runtime default paths now point under data/ (fpga.c, probes.c, script.c
bsdl_files lookup, init.c config.script). Docs (README/tutorial/CLAUDE)
updated for the new layout, src/ module paths, and ./build/bs.

Validated on the IGLOO2/FlashPro: profiles, autoinit, and svf_play all
work run from the repo root.

Co-Authored-By: Claude Opus 4.7 <noreply@anthropic.com>

data/bscan_proxies/README.md

@@ -0,0 +1,18 @@
+# BSCAN proxy bitstreams
+
+Pre-built "BSCAN proxy" bitstreams that bridge the JTAG `USER1`
+instruction to an FPGA's SPI flash pins (via a `BSCANE2` primitive),
+enabling fast SPI flashing — see `doc/tutorial.md`, Phase 2.5.
+
+These `.bit` files are **not** built here. They come from
+[quartiq/bscan_spi_bitstreams](https://github.com/quartiq/bscan_spi_bitstreams),
+© QUARTIQ GmbH, MIT-licensed — see `LICENSE.quartiq`. The host-side
+framing in `src/modules/bscan/` matches OpenOCD's `jtagspi` so the same
+bitstreams work.
+
+| File | Part | Used by |
+|------|------|---------|
+| `bscan_spi_xcku040.bit` | Xilinx Kintex UltraScale XCKU040 | KCU105 |
+
+To add another part, drop the matching `bscan_spi_<part>.bit` here and
+point the registry entry's `proxy_bitstream` field at it.