doc: document Digilent backend and probe-open by index

CLAUDE.md/README/tutorial: optional BS_ENABLE_DIGILENT backend, why
SMT2 modules need libdjtg, and the new jtag_open_probe index. Mark
phases 2 and 2.5 done.

README.md

@@ -10,7 +10,7 @@ library by Viveris (LGPL).
 
 ## Status
 
-- JTAG chain detection through FTDI / J-Link / Linux GPIO probes: OK
+- JTAG chain detection through FTDI / J-Link / Linux GPIO / Digilent SMT2 probes: OK
 - Automatic BSDL loading by IDCODE: OK
 - Pin control in SAMPLE / EXTEST: OK
 - SPI bit-bang on 4 FPGA pins (MOSI/MISO/CS/CLK): OK (low-level primitive)
@@ -26,6 +26,11 @@ in `bsdl_files/`.
 - CMake ≥ 3.10, gcc/clang
 - `readline` (Arch: `readline`, Debian/Ubuntu: `libreadline-dev`)
 - `libftd2xx` for FTDI probes (vendored in `libs/libftd2xx/`)
+- *Optional, for Digilent SMT2/SMT2-NC boards:* the Digilent
+  [Adept Runtime](https://digilent.com/shop/software/digilent-adept/)
+  installed system-wide (provides `libdjtg.so` + `libdmgr.so`).
+  Nothing from Digilent is vendored — the backend is `dlopen`'d at
+  runtime.
 
 ## Build
 
@@ -37,6 +42,12 @@ make
 
 The binary is produced at `build/bs/bs`.
 
+To enable the Digilent SMT2 backend:
+
+```sh
+cmake -DBS_ENABLE_DIGILENT=ON ..
+```
+
 ## Run
 
 ```sh
@@ -59,9 +70,10 @@ list of variables.
 ## Typical flow
 
 ```sh
-# 1. Open a probe (1 = first detected probe)
+# 1. List probes, then open one by its index (the [N] in the list)
 bs_explorer> jtag_get_probes_list
-bs_explorer> jtag_open_probe 1
+  [0]  0x00000000  <probe description>
+bs_explorer> jtag_open_probe 0          # or the raw 0x id shown next to it
 
 # 2. Scan the chain and auto-load BSDL files
 bs_explorer> jtag_autoinit
@@ -102,6 +114,11 @@ Use `help <command>` for per-command help.
   in `modules/config/config.script` for pin mapping and TCK frequency.
 - **SEGGER J-Link**
 - **Linux GPIO** (sysfs; deprecated on recent kernels, libgpiod migration TBD)
+- **Digilent JTAG-SMT2 / SMT2-NC** — optional, built when
+  `-DBS_ENABLE_DIGILENT=ON`. Required for the USB-JTAG on Xilinx eval
+  boards like the KCU105: those modules ship a Digilent-proprietary
+  firmware that does not respond to plain MPSSE, so the FTDI driver
+  appears to enumerate them but the JTAG chain stays silent.
 
 ## Known Xilinx caveats
 
@@ -121,7 +138,7 @@ modules/
 ├── jtag_core/       TAP state machine, IR/DR shifts
 ├── bsdl_parser/     .bsd loader
 ├── bus_over_jtag/   SPI / I²C / MDIO / parallel mem bit-bang
-├── drivers/         FTDI, J-Link, Linux GPIO, LPT
+├── drivers/         FTDI, J-Link, Linux GPIO, LPT, Digilent (optional)
 ├── script/          Script engine (40+ commands)
 ├── config/          Built-in config.script
 ├── os_interface/    Portable fs/network wrappers