doc: mark Phase 3 done, Phase 4 in progress
spi_flash/ landed (detect+read validated on KCU105); flash_detect and flash_read commands done, write/erase/verify still pending.
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@@ -51,8 +51,8 @@ Adding a feature usually means adding a new script command in
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| 1 | `bs/` cleanup, REPL polish, README | **done** (commit `7cb3627`) | Fix format-strings, delete dead code, tab-completion, banner |
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| 1 | `bs/` cleanup, REPL polish, README | **done** (commit `7cb3627`) | Fix format-strings, delete dead code, tab-completion, banner |
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| 2 | `fpga/` | **done** (commit `545fe09`) | Per-target descriptor (IDCODE, BSDL, IR codes, proxy path, quirks). Compile-time registry. |
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| 2 | `fpga/` | **done** (commit `545fe09`) | Per-target descriptor (IDCODE, BSDL, IR codes, proxy path, quirks). Compile-time registry. |
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| 2.5 | `bscan_spi/` | **done** (commit `dec0d14`) | Load BSCAN proxy bitstream via `CFG_IN`, expose fast `bscan_spi_xfer()` via `USER1`. Required for realistic flashing speeds. |
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| 2.5 | `bscan_spi/` | **done** (commit `dec0d14`) | Load BSCAN proxy bitstream via `CFG_IN`, expose fast `bscan_spi_xfer()` via `USER1`. Required for realistic flashing speeds. |
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| 3 | `spi_flash/` | planned | Chip database (JEDEC ID → page/sector/cmd set). Generic `read/erase/program/verify` over either backend. |
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| 3 | `spi_flash/` | **done** (commit `c4afe87`) | Chip DB (JEDEC ID → page/sector/cmd set) + generic `read/erase/program/verify` over an `xfer` callback. detect+read validated on KCU105; erase/program implemented but not yet hardware-tested. |
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| 4 | script commands | planned | `flash_detect`, `flash_read/write/erase/verify`. |
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| 4 | script commands | in progress | `flash_detect` + `flash_read` done (read-only, validated). `flash_write/erase/verify` pending — destructive on a config flash, test carefully. |
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Move forward phase by phase: validate one with the user before starting
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Move forward phase by phase: validate one with the user before starting
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the next. Don't break the validated path
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the next. Don't break the validated path
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