target: generalize the registry to FPGAs + CPUs, add program dispatch

Restructure in anticipation of programming ARM CPUs (ARM7/9 via
EmbeddedICE, e.g. over an Olimex ARM-USB-OCD); FPGA path unchanged.

- modules/fpga -> modules/target; fpga_target -> jtag_target with a
  `kind` (fpga|cpu) and grouped fpga/cpu sub-structs; data/targets.yaml
  (env BS_TARGETS); API target_*; commands target_list/target_info
  (kind-aware). Add arm7/arm9 families, arm_flash prog, embeddedice
  debug, and cpu fields (ram_base/size, flash_base/size).
- new program/: `program <dev> <file>` dispatches by the target's prog
  (svf wired; proxy_spi points at the flash workflow; arm_flash -> arm_debug).
- new arm_debug/: EmbeddedICE halt/resume/mem + arm_flash backend
  declared, not implemented yet.
- bscan_* take const jtag_target* and read the fpga sub-struct.
- data/probes.yaml: arm-usb-ocd profile slot; data/targets.yaml: an ARM7
  example entry. Docs + an ARM-debug design note in CLAUDE.md.

Builds; FPGA path re-validated on the IGLOO2 (target_list shows the CPU
example; jtag_open/autoinit/program 0 <svf> all work).

Co-Authored-By: Claude Opus 4.7 <noreply@anthropic.com>

data/probes.yaml

@@ -1,6 +1,6 @@
 # bs_explorer probe-config profiles
 #
-# Loaded at runtime by modules/probes/, layered on top of the built-in
+# Loaded at runtime by src/modules/probes/, layered on top of the built-in
 # config.script defaults. Looked up CWD-relative (run from the repo
 # root), or via $BS_PROBES.
 #
@@ -29,3 +29,10 @@ profiles:
 
   # Plain FT2232H probe: nothing to override beyond the defaults.
   ft2232h: {}
+
+  # Olimex ARM-USB-OCD (FT2232, OpenOCD-class) — for ARM CPU targets.
+  # The core MPSSE JTAG pins (TCK/TDI/TDO/TMS = ADBUS0-3) match the
+  # defaults; the control pins (nTRST, nSRST, output-buffer enable) are
+  # board-specific. TODO: fill the TRST/SRST/buffer pin numbers from the
+  # Olimex schematic / OpenOCD's interface config before driving a target.
+  arm-usb-ocd: {}