build: Digilent backend on by default on UNIX

The driver dlopen's libdjtg/libdmgr and degrades to "no probe" if
they're absent, so building it in has no cost or dependency.
BS_ENABLE_DIGILENT now defaults ON on UNIX (needs <dlfcn.h>); disable
with -DBS_ENABLE_DIGILENT=OFF. Docs updated; also fixes the quartiq
license note in CLAUDE.md (MIT, not BSD-2).
This commit is contained in:
2026-05-23 17:16:36 +02:00
parent 888f0eed5b
commit 8e3428788c
3 changed files with 31 additions and 19 deletions

View File

@@ -103,9 +103,12 @@ high ("all ones" symptom). Standard FTDI driver path is dead on these
boards. boards.
Workaround: `modules/drivers/digilent_jtag/` wraps libdjtg/libdmgr Workaround: `modules/drivers/digilent_jtag/` wraps libdjtg/libdmgr
(Digilent Adept Runtime). Built only when `-DBS_ENABLE_DIGILENT=ON`, (Digilent Adept Runtime), loaded via `dlopen` at runtime — no Digilent
loaded via `dlopen` at runtime — no Digilent binary or header in the binary or header in the repo. Because it's dlopen'd (degrades to "no
repo. End-user just needs the Adept Runtime package installed. probe" if the libs are absent), it costs nothing to build in:
`BS_ENABLE_DIGILENT` defaults **ON** on UNIX (`<dlfcn.h>` required),
disable with `-DBS_ENABLE_DIGILENT=OFF`. Adept Runtime is only needed
at runtime to actually drive such a probe.
### Xilinx caveats ### Xilinx caveats
@@ -120,7 +123,7 @@ then `JSTART` and check `DONE`.
## External references ## External references
- **BSCAN proxy bitstreams**: `quartiq/bscan_spi_bitstreams` (BSD-2). - **BSCAN proxy bitstreams**: `quartiq/bscan_spi_bitstreams` (MIT).
Pre-built `.bit` for most Xilinx parts; Migen sources to rebuild any Pre-built `.bit` for most Xilinx parts; Migen sources to rebuild any
part that's missing (needs Vivado). part that's missing (needs Vivado).
- **Reference host-side implementation**: `openocd/src/flash/nor/jtagspi.c`. - **Reference host-side implementation**: `openocd/src/flash/nor/jtagspi.c`.
@@ -138,9 +141,9 @@ mkdir build && cd build && cmake .. && make
./bs/bs # interactive REPL ./bs/bs # interactive REPL
``` ```
For Digilent SMT2-based boards, configure with The Digilent SMT2 backend is built by default on UNIX (disable with
`cmake -DBS_ENABLE_DIGILENT=ON ..` and install the Adept Runtime `-DBS_ENABLE_DIGILENT=OFF`). To actually use such a probe, install the
system-wide (provides `libdjtg.so` + `libdmgr.so`). Adept Runtime system-wide (provides `libdjtg.so` + `libdmgr.so`).
No automated tests yet. Smoke test = banner appears, `exit` works. No automated tests yet. Smoke test = banner appears, `exit` works.
After changes touching `jtag_core`, `drivers/ftdi_jtag`, or the After changes touching `jtag_core`, `drivers/ftdi_jtag`, or the

View File

@@ -2,10 +2,17 @@ cmake_minimum_required(VERSION 3.10)
project(BoundaryScanExplorer) project(BoundaryScanExplorer)
# Optional backends. Off by default: no proprietary runtime dependency. # Digilent JTAG-SMT* backend. The driver dlopen's libdjtg/libdmgr at
# runtime and degrades to "no probe" if they're absent, so building it
# in costs nothing — default ON. Needs <dlfcn.h>, so UNIX only.
if(UNIX)
set(BS_DIGILENT_DEFAULT ON)
else()
set(BS_DIGILENT_DEFAULT OFF)
endif()
option(BS_ENABLE_DIGILENT option(BS_ENABLE_DIGILENT
"Enable Digilent JTAG-SMT* backend (dlopen libdjtg.so / libdmgr.so at runtime; requires Adept Runtime installed)" "Enable Digilent JTAG-SMT* backend (dlopen libdjtg.so / libdmgr.so at runtime; Adept Runtime only needed to actually use such a probe)"
OFF) ${BS_DIGILENT_DEFAULT})
# script and jtag_core must be the last linked archive for the application to compile # script and jtag_core must be the last linked archive for the application to compile
set(BS_MODULES script jtag_core) set(BS_MODULES script jtag_core)

View File

@@ -26,11 +26,12 @@ in `bsdl_files/`.
- CMake ≥ 3.10, gcc/clang - CMake ≥ 3.10, gcc/clang
- `readline` (Arch: `readline`, Debian/Ubuntu: `libreadline-dev`) - `readline` (Arch: `readline`, Debian/Ubuntu: `libreadline-dev`)
- `libftd2xx` for FTDI probes (vendored in `libs/libftd2xx/`) - `libftd2xx` for FTDI probes (vendored in `libs/libftd2xx/`)
- *Optional, for Digilent SMT2/SMT2-NC boards:* the Digilent - *To drive a Digilent SMT2/SMT2-NC probe:* the Digilent
[Adept Runtime](https://digilent.com/shop/software/digilent-adept/) [Adept Runtime](https://digilent.com/shop/software/digilent-adept/)
installed system-wide (provides `libdjtg.so` + `libdmgr.so`). installed system-wide (provides `libdjtg.so` + `libdmgr.so`).
Nothing from Digilent is vendored — the backend is `dlopen`'d at Nothing from Digilent is vendored — the backend is `dlopen`'d at
runtime. runtime, so it's built in by default and simply reports no probe if
the libs are missing.
## Build ## Build
@@ -42,10 +43,10 @@ make
The binary is produced at `build/bs/bs`. The binary is produced at `build/bs/bs`.
To enable the Digilent SMT2 backend: The Digilent SMT2 backend is built by default on Linux. To leave it out:
```sh ```sh
cmake -DBS_ENABLE_DIGILENT=ON .. cmake -DBS_ENABLE_DIGILENT=OFF ..
``` ```
## Run ## Run
@@ -114,11 +115,12 @@ Use `help <command>` for per-command help.
in `modules/config/config.script` for pin mapping and TCK frequency. in `modules/config/config.script` for pin mapping and TCK frequency.
- **SEGGER J-Link** - **SEGGER J-Link**
- **Linux GPIO** (sysfs; deprecated on recent kernels, libgpiod migration TBD) - **Linux GPIO** (sysfs; deprecated on recent kernels, libgpiod migration TBD)
- **Digilent JTAG-SMT2 / SMT2-NC** — optional, built when - **Digilent JTAG-SMT2 / SMT2-NC** — built in by default on Linux
`-DBS_ENABLE_DIGILENT=ON`. Required for the USB-JTAG on Xilinx eval (`-DBS_ENABLE_DIGILENT=OFF` to drop it). Required for the USB-JTAG on
boards like the KCU105: those modules ship a Digilent-proprietary Xilinx eval boards like the KCU105: those modules ship a
firmware that does not respond to plain MPSSE, so the FTDI driver Digilent-proprietary firmware that does not respond to plain MPSSE,
appears to enumerate them but the JTAG chain stays silent. so the FTDI driver appears to enumerate them but the JTAG chain stays
silent.
## Known Xilinx caveats ## Known Xilinx caveats