From 4f46bc6d3c4c3b566ef19116fd6a080dbcdcc98f Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Fran=C3=A7ois?= Date: Sun, 24 May 2026 00:04:31 +0200 Subject: [PATCH] doc: proxy SPI path validated on KCU105 (JEDEC 0x20 BB 19) bscan_load_bitstream + bscan_jedec confirmed end to end on a KCU105: reads the Micron MT25QU256 config flash (0x20 BB 19) through the quartiq XCKU040 proxy. Replace the illustrative JEDEC output with the real one. --- doc/tutorial.md | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/doc/tutorial.md b/doc/tutorial.md index 57e25f0..132f1b8 100644 --- a/doc/tutorial.md +++ b/doc/tutorial.md @@ -221,11 +221,12 @@ bs_explorer> jtag_open 1 bs_explorer> jtag_autoinit bs_explorer> bscan_load_bitstream 0 bscan_proxies/bscan_spi_xcku040.bit bs_explorer> bscan_jedec 0 -JEDEC ID: 20 XX XX (manufacturer 0x20, device 0xXXXX) +JEDEC ID: 20 BB 19 (manufacturer 0x20, device 0xBB19) ``` -(The exact device bytes depend on the part fitted; on the KCU105 the -manufacturer byte should read `0x20` = Micron.) +(Validated on a KCU105: `0x20` = Micron, `0xBB19` = MT25QU256, the +board's 1.8 V 256 Mbit config flash. Other boards will show different +device bytes.) `bscan_load_bitstream` runs JPROGRAM → CFG_IN → shift → JSTART, which **reconfigures the FPGA fabric**: the design currently running on the