jtag: driver-neutral JTAG_TCK_FREQ_KHZ clock (phase A)

One clock knob across probes instead of per-driver names:
- jtag_open mirrors JTAG_TCK_FREQ_KHZ into PROBE_FTDI_TCK_FREQ_KHZ for
  the Viveris FTDI driver (read-only at init); unset leaves the existing
  value untouched
- the Digilent driver reads JTAG_TCK_FREQ_KHZ directly instead of
  hardcoding 4 MHz (falls back to 4 MHz when unset)
- documented in probes.yaml; CLAUDE.md design note marks phase A done

FTDI path validated on the IGLOO2/FlashPro (250 kHz, mirror confirmed);
Digilent path not hardware-tested.

Co-Authored-By: Claude Opus 4.7 <noreply@anthropic.com>

CLAUDE.md

@@ -183,8 +183,11 @@ fact bounded by both the probe and the board/device.
 
 ### Phasing
 
-- **A** — one canonical `tck_khz` honoured by FTDI (shim) + Digilent
-  (read it): kills the immediate smell, one knob for the two real probes.
+- **A (done)** — one canonical `JTAG_TCK_FREQ_KHZ` (kHz): mirrored to
+  `PROBE_FTDI_TCK_FREQ_KHZ` at `jtag_open` for the Viveris FTDI driver,
+  read directly by our Digilent driver; unset → each driver's own default
+  (FTDI 1000, Digilent 4000). Set it via `set`, a `probes.yaml` profile,
+  or `defaults:`. (FTDI path hardware-validated; Digilent path untested.)
 - **B** — device `max_tck_khz` + resolution after `jtag_autoinit`.
 - **C** — generalise the other link settings (reset/RTCK) and wire the
   `prog` method tag into backend dispatch (ties into the SVF player).